1. Field of the Invention
The present invention relates to a plasma processing apparatus.
2. Description of the Related Art
A plasma processing apparatus for processing a substrate, such as a semiconductor wafer or a glass substrate for a liquid crystal display device, by using plasma, for example, a plasma etching apparatus or a plasma chemical vapor deposition (CVD) apparatus, has been used to manufacture a semiconductor device or the like.
In the plasma processing apparatus, a holding stage on which a substrate is held is provided in a processing chamber and an electrostatic chuck for adsorbing the substrate is provided in the holding stage. The plasma processing apparatus including the electrostatic chuck provided in the holding stage is configured such that, in order to protect the electrostatic chuck from plasma, a holding surface of the holding stage has a convex shape and a size of the holding surface having the convex shape is slightly less than a size of the substrate, so as for an adsorbing surface of the electrostatic chuck provided on the holding surface not to be exposed to the plasma.
Also, in a plasma processing apparatus including a focus ring provided around a substrate such as a semiconductor wafer, an electrostatic chuck for adsorbing the focus ring is provided in addition to an electrostatic chuck for adsorbing the semiconductor wafer, and the focus ring is adsorbed to a holding stage, to control a temperature of the focus ring by using a temperature control medium circulating in the holding stage (as disclosed in, for example, Patent Document 1).
Also, in a plasma processing apparatus for processing a semiconductor wafer having a diameter of, for example, 300 mm, a diameter of a holding surface of a holding stage having a convex shape (a diameter of an adsorbing surface of an electrostatic chuck) ranges from, for example, about 296 to 298 mm, and the entire adsorbing surface of the electrostatic chuck is covered by the semiconductor wafer, so as for the adsorbing surface of the electrostatic chuck not to be exposed to plasma during processing. Also, in this case, a diameter of an electrode for the electrostatic chuck buried in the adsorbing surface of the electrostatic chuck is even less than a diameter of the adsorbing surface.
Also, a plasma processing apparatus is configured such that a focus ring having a thin plate shape is held on the same plane as a semiconductor wafer, and thus an impedance of the focus ring gets closer to an impedance of the semiconductor wafer (as disclosed in, for example, Patent Document 2).
As described above, in a conventional plasma processing apparatus, diameters of a holding surface of a holding stage on which a substrate is held and an adsorbing surface of an electrostatic chuck provided on the holding surface are less than a diameter of a semiconductor wafer to be subjected to plasma processing, so as for the adsorbing surface of the electrostatic chuck not to be exposed to plasma.
However, in the plasma processing apparatus configured as described above, since a peripheral portion of a semiconductor wafer is not adsorbed to an electrostatic chuck, a temperature of the peripheral portion of the semiconductor wafer may be higher than that of other portions. Accordingly, due to a temperature difference between a central portion and the peripheral portion of the semiconductor wafer, a plasma processing state may vary between the central portion and the peripheral portion of the semiconductor wafer. For example, when a hole is formed in a to-be-etched film formed on the semiconductor wafer by using plasma etching, generation of the hole may vary between the central portion and the peripheral portion of the semiconductor wafer, or a selectivity of the to-be-etched film with respect to a photoresist may vary between the central portion and the peripheral portion of the semiconductor wafer. Accordingly, in-plane uniformity of plasma processing is reduced. Also, the aforesaid technology of Patent Document 2 pays attention to impedance, and does not consider temperature.
[Patent Document 1] Japanese Laid-Open Patent Publication No. hei 10-303288
[Patent Document 2] Japanese Laid-Open Patent Publication No. 2004-235623